As an ASIC Verification Engineer at NVIDIA, you will be responsible for planning and implementing IP/Cluster/SOC functional verification of designs that constitute our Graphics Processors and Tegra SOCs. You will work on creating regression plans for code as well as functional coverage closure. You will perform pre-silicon validation activities such as XPROP simulations and GLS.
Your responsibilities will include:
- Owning ASIC verification of IP/Cluster for complicated designs in RTL.
- Working with HW architects and designers to make the right implementation choices.
- Interacting with the Performance verification teams to augment verification through dynamic simulations and/or Formal verification techniques.
- Ensuring functional and code coverage of all the RTL which you will verify.
- Partnering with and enabling FPGA and S/W teams to ensure that S/W is tested.
- Being involved with post-silicon verification and debug.
To succeed in this role, you will need:
- A Bachelor's or Master's degree in Computer Science or related field.
- At least 2 years of design experience.
- Experience in ASIC verification of complex design units for at least one or two projects.
- Background with design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).
- Exposure to System Verilog and UVM based methodology for ASIC verification is highly desired.
Preferred qualifications include:
- Knowledge of Memory controllers or prior experience with verification of IP/clusters involving access to Memory.
- Good debugging and problem solving skills.
- Scripting knowledge (Python/Perl/shell).
- Good interpersonal skills and ability & desire to work as a part of a team.
XML job scraping automation by YubHub
