As a Subsystem Architect at Reality Labs Silicon team, you will lead subsystem level requirement definition on upcoming AR/VR products. You will leverage systems expertise to drive architecture convergence on complex consumer electronics products. You will collaborate with experts in different fields to make architectural tradeoffs. You will own the accelerator system architecture on our upcoming SoCs for AR/VR products, thrive in ambiguity, and contribute significantly to mapping trade spaces. You will also act as a key point-of-contact representing the team with varying internal and external partners, in a highly cross-functional environment, delivering on challenging demands.
What you'll do
- Own subsystem KPI requirement, deliver subsystem architecture specifications and drive cross-functional workstream prioritization
- Define subsystem power consumption modeling, use-case data flow, and latency analysis
- Drive accelerator subsystem architecture decisions while effectively navigating through ambiguity
- Work with product management and engineering teams across HW, SW, and FW to understand E2E technical stack while determining system feature sets
- Communicate technology and product strategy effectively to both internal and external stakeholders
- Help define long-term technology roadmap and guide management and partner teams on technology investments
What you need
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
- 8+ years of product experience in electrical engineering, computer engineering, or equivalent
- 5+ years of experience with system architecture across FW, SW, silicon, and thermal engineering
- 3+ years of experience working in memory management (cache, DRAM, allocation strategies, etc.) and analyzing its impact on overall system performance
- 3+ years of experience modeling subsystem power and performance, and using those models to inform in tradeoff analysis against key architectural decisions (e.g. battery life, thermals, silicon roadmaps, power load profiles)
- 2+ years of experience with C/C++ and Python, including code review and design principles
- Expertise creating system models to analyze system compute, latency, and communication interface bandwidths
